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AR# 24019

LogiCORE FIFO Generator v3.2 - Core cannot be generated when selecting input_depth=16 and output_depth=128 or input_depth=128 and output_depth=16


Invalid Programmable Full Assert Threshold range displayed in GUI for Independent Clock Block RAM FIFOs with input_depth=16 and output_depth=128 or input_depth=128 and output_depth=16. The core cannot be generated.


To solve this issue, install a patch over ISE 8.2i IP Update #2. The patch is available from (Xilinx Answer 24172)


This issue has been fixed in the FIFO Generator v3.3 Core.

AR# 24019
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article