EDK OPB IIC - Data read from the IIC EEPROM does not match the data written to the IIC EEPROM on the ML403 Evaluation Board
Description
Keywords: processor IP, OPB_IIC, SCL, SDA, rise time, capacitance, OPB, ML403, OPB IIC, Pull up
The ML403 is not meeting the rise time on IIC_SCL and IIC_SDA signals according to the IIC bus specification. I verified that the IIC failures do not exist when the strong (1.2K) resistors are used for R70 and R71 resistors.
Solution
Measure the rise time of the IIC_SCL and IIC_SDA signals. Depending upon the mode of operation supported, stronger pull-up resistors might need to be installed. Caution must be taken for the mode of operation supported. The IIC rise time for standard mode of operation is 1000 ns (max); however, the IIC rise time for fast mode of operation is 300 ns (max). Select a resistor value to meet the rise time requirement for the mode of operation that must be supported. Also, the IIC IO signals can sink a maximum of 6 mA, so you must take care to choose a resistor value that does not exceed this.For example, if 10K ohm resistors are used to pull-up the IIC_SDA and IIC_SCL signals, and the voltage source to the resistors is 2.5V, this would equate to a current of 2.5V/10000 ohms = 0.25mA.
Refer to the I2C-bus specification in the "Philips IIC bus, v2.1, release January 2000" for application information.