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8.2i EDK SP2 - plb_temac_v3_00_a - PLB TEMAC fails to assert RECV interrupt consistently in SGDMA interrupt mode

AR# 24053

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Topic IP-Processor
Last Updated 09/29/2006
Status Active
Description

Keywords: processor IP

If RX threshold and RX wait bound are both set to (1) in SG DMA interrupt mode (i.e. [RX.Threshold, RX.Waitbound] = [1, 1]), PLB TEMAC fails to assert RECV interrupt after receiving few packets. This failure is confirmed in both TEMAC Linux 2.4 adapter v1_00_a and modified standalone TEMAC driver v1_00_a sgdma_intr example.

It is possible that there are some other [RX.Threshold, RX.Waitbound] value pair combinations causing the same failure.

[RX.Threshold, RX.Waitbound] = [2, 2] was tested and PLB TEMAC is very stable asserting RECV interrupt in this case.

The combination of [RX.Threshold, RX.Waitbound] = [1, 1] is not applicable in normal useful system.

Solution

This issue will be resolved in the future release of PLB TEMAC. Currently, it is not assigned a high priority due to limited usage.
 
 
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