9.2 ChipScope - Warning on invalid data from the Virtex-5 or Virtex-6 System Monitor

AR#	24144	Search For Another Answer
Topic	Agile Mixed Signal
Last Updated	10/12/2011
Status	Active

Description

From 8.2.4 ChipScope onwards, the System Monitor console reports invalid data in some cases. What causes the invalid data?

Solution

Possible reasons for incorrect data: 

 

- The most likely cause for this error message is due to an invalid System Monitor setup. 

The System Monitor connection requirement is documented in the System Monitor User Guide.  

Virtex-5:  

http://www.xilinx.com/support/documentation/user_guides/ug192.pdf
Figure 23 details the required connections. 

 

Virtex-6: http://www.xilinx.com/support/documentation/user_guides/ug370.pdf
Figure 24 details the required connections. 

Please ensure that these recommendations have been followed. 

 

- Both the Virtex-5 and Virtex-6 FPGA have a BitGen option that allows the disabling of the JTAG connection to the System Monitor ( -g JTAG_sysmon:disable). If the JTAG connections are disabled, then ChipScope will contain invalid data.  

 

- Early Virtex-5 FPGA samples did not have a working System Monitor.