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AR# 24167

CPLD Frequently Asked Questions for XC9500/XL/XV and CoolRunner-II/XPLA3 families


Keywords: CoolRunner-II, CoolRunner XPLA3, XC9500, XC9500XL, XC9500XV, FAQ

Below are some of the most Frequently Asked Questions by CPLD designers.


What are some good design practices to follow when using a Xilinx CPLD?
- Refer to (Xilinx XAPP784): Bulletproof CPLD Design Practices

How do I program a Xilinx CPLD?
- Refer to (Xilinx Answer 7585)

How are the initial states of registers set?
- Refer to (Xilinx Answer 3123)

How do the global buffers work (GTS, GSR, GCK)?
- Refer to (Xilinx Answer 3122)

What is the state of I/O during power up and power down?
- Refer to (Xilinx Answer 7648)

How do I prevent the tools from using a particular I/O pin?
- Refer to (Xilinx Answer 1987)

Are there best-case (minimum) timing numbers available?
- Refer to (Xilinx Answer 17006)

What decoupling recommendations exist for Xilinx CPLDs?
- Refer to (Xilinx Answer 7621)

Where can I see an I/V curve for the CPLD I/O?
- Refer to (Xilinx Answer 3116)

How do I internally source global signals such as GCK or GTS?
- Refer to (Xilinx Answer 5572)

How much current can I sink or source from an I/O pin ?
- Refer to (Xilinx Answer 5770)

What should I do with my unused I/O pins?
- Refer to (Xilinx Answer 8458)

What should I do with my unused JTAG pins?
- Refer to (Xilinx Answer 1408)

How can I use the internal pullup resistor in a 9500/XL/XV device?
- Refer to (Xilinx Answer 3026)

How much power can I sink into a CPLD?
- Refer to (Xilinx Answer 1308)

How do I create an open-drain output?
- Refer to (Xilinx Answer 1651)

How do I control power consumption in a 9500/XL/XV device?
- Refer to (Xilinx Answer 2717)

XPLA3 : How does the Port Enable pin work?
- Refer to (Xilinx Answer 8455)

XPLA3 XC9500XL/XV : How do I drive 5V logic from a 3.3V/2.5V device?
- Refer to (Xilinx Answer 6717)

Where can I find a CPLD Demo board?
- Refer to (Xilinx Answer 7855)

Where can I find documentation on constraints applicable to CPLDs?
- Refer to:

Where can I find information on how to use the CoolRunner-II advanced features such as DataGate or CoolClock?
- Refer to (Xilinx XAPP378): Using CoolRunner-II Advanced Features

Which CPLDs have 5V tolerant I/Os?
- The XC9500, XC9500XL, and CoolRunner XPLA3 CPLDs have 5 Volt tolerant I/Os. For CoolRunner-II, an application note exists describing how to add circuitry to make it 5 Volt-tolerant. - (Xilinx XAPP429): 5V Tolerance Techniques

How do I estimate power consumption of my CPLD?
- The CoolRunner XPLA3 and CoolRunner-II devices are supported in XPower. XPower requires a completed design to function. For the XC9500/XL/XV families, there is a power estimation equation on the front page of the respective family data sheet. CoolRunner-II has a similar method of power estimation described in (Xilinx XAPP317): Power Evaluation for CoolRunner-II.

Can I use a crystal or RC oscillator with my Xilinx CPLD?
- This is not recommended with Xilinx CPLDs. The frequency generated by such an oscillator is typically too unstable since it can vary with voltage and temperature.
AR# 24167
Date 11/07/2006
Status Active
Type General Article