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AR# 24256

MPMC2 v1.7 - Reference design for the ML310 / Virtex-II Pro architectures


A reference design has been made available for the Multi Port Memory Controller 2. This reference was made with version 1.7 of the MPMC2 GUI.


The file is available for download from the Xilinx FTP site at:


The ZIP file contains an XPS project with a 5-port MPMC2 DDR core configured for the ML310 board.
AR# 24256
Date 11/12/2010
Status Archive
Type General Article
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