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AR# 24272

8.2.01 System Generator for DSP - Why are there simulation mismatches when there are two different data types on the two data inputs of my Dual Port Block RAM (DPRAM) block?

Description

Why are there simulation mismatches when there are two different data types on the two data inputs of my Dual Port Block RAM (DPRAM) block? 

 

For example, the DPRAM block has simulation mismatches when port A is unsigned and B is signed or if the opposite is true, and the port A is signed and B is unsigned.

Solution

To work around this issue, you must have the same data type values presented on the input ports and use the reinterpret block to convert the values to the appropriate data type at the output of the Dual Port Block RAM block.  

 

This issue is fixed in System Generator 9.1.

AR# 24272
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article