| AR# | 24293 |
| Topic | EDK-simgen |
| Last Modified | 2007-12-06 00:00:00.0 |
| Status | Active |
Keywords: optimization, -vopt, -novopt
I am trying to simulate my EDK system. When I run the simulation in ModelSim 6.2b, I receive an error message similar to the following during the optimization phase:
"Error Message:
---------------------------------------
D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_v20_v1_10_c/hdl/vhdl/opb_v20.
vhd(550): (vopt-1144) Value 0 is out of std.standard.natural range 1 to
32.
# ** Error:
D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_arbiter_v1_02_e/hdl/vhdl/park
_lock_logic.vhd(359): (vopt-1144) Value 0 is out of std.standard.natural
range 1 to 32.
# ** Error:
D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_arbiter_v1_02_e/hdl/vhdl/park
_lock_logic.vhd(429): (vopt-1144) Value 0 is out of std.standard.natural
range 1 to 32.
# Optimization failed
# Error loading design
# Error: Error loading design
# Pausing macro execution"
The following warning message has also been seen when doing a Verilog simulation flow:
** Warning: edk_ise_libs/./unisims_ver/unisims_ver_virtex5_source.v(46640): [BSOB] - Bit-select into 'memp' is out of bounds.
I was able to simulate this same design using a previous version of ModelSim (for example, 6.0a and 6.2a). The previous version of ModelSim did not include this optimization phase. What could be the problem?