LogiCORE Direct Digital Synthesis (DDS) Compiler v1.1 - Why is the behavioral simulation output incorrect, when using the structural simulation model?

AR#	24316	Search For Another Answer
Topic	IP-DSP Horizontal
Last Updated	09/15/2008
Status	Active

Description

Keywords: 8.2i, ISE, CORE Generator, DDS, behavioral, structural, simulation, 1.0, 1.1

Why is the behavioral simulation output incorrect, when using the structural simulation model?

Solution

This is a known issue. The recommended way to work around this problem is to use the VHDL behavioral model for the DDS Core.

An alternative would be to use the post-translate flow. For more information on this flow, see (Xilinx Answer 22333).