Description
Keywords: 8.2i, ISE, CORE, CORE Generator, CORE Generator, DDS, GUI
Why are the outputs on the DDS schematic symbol always displayed as 32 bits wide?
Solution
This is only an issue in the core schematic symbol. The actual values are the correct size in the HDL template, and in the netlist. You can find the correct size by looking at the ".vho" file that is output from COREGen.
This issue will be addressed in the next version of the DDS, v2.0.