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9.1i RTL Viewer - Schematic symbols in the RTL viewer are displayed as rectangle blocks

AR# 24516

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Topic SW-Schematic
Last Updated 04/13/2009
Status Archive
Description

Keywords: VHDL, Verilog, square, rectangle, symbol, block, macro, primitive, UniSim, model, shapes

The RTL Viewer does not use macro and primitive predefined shapes when displaying an RTL schematic.

Solution

This problem has been fixed in the latest 9.1i Service Pack available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 9.1i Service Pack 1.
 
 
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