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AR# 24631

8.2i EDK SP2 - plb_ddr2_v1_00_a and plb_ddr2_v1_01_a contain corner cases in the calibration logic causing occasionally read data corruption from the memory or hang the processor

Description

PLB_DDR2 (plb_ddr2_v1_00_a, plb_ddr2_v1_01_a) contains corner cases in the calibration logic causing data read from the memory get corrupted or it hangs the processor. Also, there is an issue with the write data path FIFO empty flag. 

 

Refer to "Change Log" for additional information.

Solution

This patch fixes the corner cases in the calibration logic and the issue with the write data path FIFO empty flag. 

 

This latest version of the core will be released in EDK 9.1.01i. 

 

You can download the latest "plb_ddr2_v1_02_a" patch from the following link: 

http://www.xilinx.com/txpatches/pub/applications/misc/plb_ddr2_v1_02_a.zip
 

To install the patches, follow the instructions provided in (Xilinx Answer 23474) - "How do I install a patch for the Processor IP Core in EDK tools?"

AR# 24631
Date Created 09/04/2007
Last Updated 05/21/2014
Status Archive
Type General Article