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AR# 24674

8.2i EDK - Modelsim errors out when simulating a Microblaze v5 with cache (functional simulation)


Keyword: Microblaze, MB, cache, functional simulation

ModelSim errors out when simulating an MB system with 16KB instruction and data cache. The Microblaze version is v5. The error message is the following:

Error Message:


# ** Fatal: (vsim-3471) Slice range (0 to 17) does not belong to the prefix index range (0 to 15).

# Time: 0 ps Iteration: 0 Process: /system/microblaze_0/microblaze_0/using_dcache/dcache_i1/tag_bram_module/padding_vectors File: ./hdl/vhdl/bram_module.vhd

# FATAL ERROR while loading design

# Error loading design


This problem occurs when the cache size is 16kB in MB v5.

To work around this, either use a different cache size or simulate the design using structural/timing simulation model.

This problem has been fixed in EDK 9.1i.

AR# 24674
Date 12/15/2012
Status Active
Type General Article
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