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AR# 24801

MPMC2 v1.7 - Recommended FIFO and Pipeline Configurations

Description

The documentation is unclear about which FIFO and Pipeline configurations are recommended. What are the recommended configurations?

Solution


In MPMC2 release v1.7, the following configurations are recommended:



SRL FIFOs Configuration:



* All data path pipelines enabled FOR EVERY PORT:

Read Pipeline:

Memory Side - enabled

Port Side - enabled

Write Pipeline:

Memory Side - enabled

Port Side - enabled

Write Output Pipeline:

Memory Side - enabled



* All data path pipelines disabled FOR EVERY PORT:

Read Pipeline:

Memory Side - disabled

Port Side - disabled

Write Pipeline:

Memory Side - disabled

Port Side - disabled

Write Output Pipeline:

Memory Side - disabled





BRAM FIFOs Configuration:



* Write Output Pipeline enabled with all data path pipelines enabled FOR EVERY PORT:

Read Pipeline:

Memory Side - enabled

Port Side - enabled

Write Pipeline:

Memory Side - enabled

Port Side - enabled

Write Output Pipeline:

Memory Side - enabled



* Write Output Pipeline enabled with all data path pipelines disabled FOR EVERY PORT:

Read Pipeline:

Memory Side - disabled

Port Side - disabled

Write Pipeline:

Memory Side - disabled

Port Side - disabled

Write Output Pipeline:

Memory Side - enabled
AR# 24801
Date Created 09/04/2007
Last Updated 11/12/2010
Status Archive
Type General Article