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AR# 24920

9.1i Virtex-5 FPGA Editor - ILA cores are not recognized by FPGA Editor

Description

Keywords: ILA, FPGA, Editor, recognize, recognized

I have an ILA Core in my Virtex-5 design and have confirmed that it is there. When I try to use FPGA Editor to modify the ILA connectivity, I find that it is not recognized. What is necessary for FPGA Editor to recognize an ILA Core?

For ILA cores to be recognized, two conditions must be met:

1. A signal must exist that contains one of the following strings:
"i_dt0/1/data_dly1"
"i_dt1/1/data_and_trig_dly1"
"i_dt0/1/trig_dly1"

2. For each signal found above, the driver must be a slice register whose data input is driven through the direct input. FPGA Editor examines the slice configuration strings to check for the correct connectivity:

Virtex-4, Spartan-3 and earlier architectures:
comp path: BY -> YQ required config pattern: BYMUX:0 BYINV:BY
comp path: BX -> XQ required config pattern: BXMUX:1 BXINV:BX

Virtex-5:
comp path: AX -> AQ required config pattern: AFFMUX:AX
comp path: BX -> BQ required config pattern: BFFMUX:BX
comp path: CX -> CQ required config pattern: CFFMUX:CX
comp path: DX -> DQ required config pattern: DFFMUX:DX

Prior to ISE version 9.2i, FPGA Editor has not been properly updated to look for the correct Virtex-5 configuration strings.

NOTE: For all other architectures and for Virtex-5 after 9.2i, a failure to recognize the ILA Core is likely due to register packing that violates the above rules. Two common problems are:

1. Register packed into IOB or OLOGIC component instead of Slice. Use "IOB = FALSE" attribute to correct.
2. LUT logic driving FF is packed into same slice so that direct connection is not used. Use "XBLKNM = some_name" on one or more FFs to force them to be packed alone in the slice so that direct connection is used. Four FFs can occupy a Virtex-5 slice and two in all other architectures.

Solution

ISA 9.1i FPGA Editor does not recognize ILA cores in Virtex-5 designs. This problem is scheduled to be fixed in ISE version 9.2i. A tactical patch is available for use with all 9.1i service pack revisions and all platforms to correct this problem:

http://www.xilinx.com/txpatches/pub/swhelp/ise9_updates/91i_fed_all_24920.zip

To install, unzip in the XILINX install directory while maintaining directory structure.



AR# 24920
Date Created 03/14/2007
Last Updated 08/21/2007
Status Active
Type General Article