AR #24968 - LogiCORE RapidIO - Logical Layer Receive side cannot handle stalls on incoming Rx packets, data corruptions might be seen

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LogiCORE RapidIO - Logical Layer Receive side cannot handle stalls on incoming Rx packets, data corruptions might be seen

AR# 24968
Part IP-SystemIO RapidIO
Last Modified 2007-03-28 00:00:00.0
Status Active
Keywords serial, high, speed, high-speed, PHY, logical, design environment, rio, rapid, IO, MGT, 9.1i, I/O, logical, transport, layer, buffer, stalling, discontinue

Description

Keywords: serial, high, speed, high-speed, PHY, logical, design environment, rio, rapid, IO, MGT, 9.1i, I/O, logical, transport, layer, buffer, stalling, discontinue

The Logical Layer Receive side does not appropriately handle stalls on incoming Rx packets. Data corruption might be seen when stalling the Local Link interface from the buffer to the Logical Layer.

Solution

All user-created buffers should act as store and forward in order to avoid source side stalls into the Logical Layer receive side. This is not an issue if you use the Xilinx provided buffer, as it is a store and forward buffer.

 
 
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