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AR# 24991

9.1i Install - EDK Service Pack Release Notes (README)


Keywords: SP1, SP2, Solaris, Linux, PC, software, update

This README Answer Record contains the Release Notes for 9.1i Service Packs.

The Release Notes include installation instructions and a list of the issues that have been fixed. EDK Service Packs are cumulative; for example, fixes in Service Pack 1 are also included in Service Pack 2.

NOTE: EDK 9.1i sp1 requires ISE 9.1i sp2 or later, and EDK 9.1i sp2 requires ISE 9.1i sp3


A successful installation of Xilinx EDK 9.1i Service Pack "x" updates your software version number to 9.1.0xi.

- The destination directory specified during the setup operation must contain an existing Xilinx EDK installation. Only existing files are updated.
- You must set the XILINX and XILINX_EDK environment variables before installing the Service Pack.

Installation Instructions for Windows Users

1. Download the EDK_9_1_0xi_win.exe file at:

2. Run the EDK_9_1_0xi_win.exe file.

Installation Instructions for Red Hat Linux and Solaris Users

1. Download the EDK_9_1_0xi_<platform>.zip file at:

2. Move the ".zip" file to an empty "staging" area and unzip the downloaded file.


mv EDK_9_1_0xi_<platform>.zip /home/<staging_dir>
cd /home/<staging_dir>
unzip EDK_9_1_0xi_<platform>.zip

3. Run setup.

Issues Fixed by 9.1i Service Pack 1

9.1i EDK - "ERROR:PersonalityModule:7 - Unable to open Xilinx data file for Vendor/Device Module "spartan3adspsd"" (Xilinx Answer 24873)
9.1i EDK - When I use XMD on a Virtual Platform, XMD generates "DebugWrite not implemented for address 0x20100000" (Xilinx Answer 24731)
9.1i EDK - ML505 - ML505 ZBT SRAM clock signal integrity issue (Xilinx Answer 24955)
9.1i EDK - The VxWorks BSP is not being built on Windows XP (Xilinx Answer 24909)
9.1i EDK - "Error: (vsim-SDF-3196) Failed to find SDF file "system_tb.sdf"" (Xilinx Answer 24737)
9.1i EDK - "ERROR:MDT - xget_handle PROCESSOR * : A NULL handle was provided" (Xilinx Answer 24739)
9.1i EDK - ERROR: dcm_0_wrapper.vhd line 110 - Type of C_CLKDV_DIVIDE is incompatible with type of 16 (Xilinx Answer 24651)
9.1i EDK - The 8.2 software application no longer compiles in SDK 9.1 (Xilinx Answer 24760)
9.1i EDK - Profiling on XMD writes out a "gmon.out" file that is very large (Xilinx Answer 24762)
9.1i EDK - MicroBlaze v5/v6.0a integer divide gives incorrect results (Xilinx Answer 24999)
9.1i EDK - EDK un-install does not remove all of the files (Xilinx Answer 24960)
9.1 EDK - XMD crashes on Windows with a design on Spartan-3A starter kit (Xilinx Answer 25004)
9.1 EDK - XPS System assembly view does not reflect MHS correctly (Xilinx Answer 25005)
9.1 EDK - XPS writes out MHS file even when there are no changes made (Xilinx Answer 25006)
9.1i EDK - SystemACE - genace.tcl does not work for dual PPC405 ML410 designs (Xilinx Answer 25008)
9.1i EDK - MicroBlaze design on Spartan-3A fails in PlatGen (Xilinx Answer 25010)
9.1i EDK- Addition of MicroBlaze to a PowerPC FPU project causes DRC error (Xilinx Answer 25011)
9.1i EDK - XMD fails watchpoint write break on MB (Xilinx Answer 25013)
9.1i EDK - Changing the version of an instance in MHS (XPS text editor) crashes XPS (Xilinx Answer 25012)
9.1i EDK - MHS Changes made using ISE text editor are not saved (Xilinx Answer 25009)
9.1i EDK - XPS overwrites changes made in external text editor (Xilinx Answer 25014)
9.1i EDK SP1, 'dmacentral_v1_00_b' software driver is missing in the EDK9.1i Service Pack 1 release. (Xilinx Answer 25019)

Issues Fixed by 9.1i Service Pack 2

9.1i EDK - ERROR:MDT - Given value for Parameter RS232_Uart:C_CLK_FREQ - system.mhs line 184 is = 75000000 (Xilinx Answer 25132)
9.1i EDK - There is no serial output on the terminal after downloading the VxWorks image (Xilinx Answer 25125)
9.1i EDK - SDK - Error: "make: *** No rule to make target 'C:/Test/src/Test.ld', needed by 'Test.elf' " (Xilinx Answer 25071)
9.1i EDK - "Warning: Attribute Syntax Warning The attribute FACTORY_JF on DCM_ADV instance * is set to 1100000010000000." (Xilinx Answer 25042)
9.1i EDK - I cannot compile Linux 2.6 for my EDK project (Xilinx Answer 24997)
9.1i EDK - The VxWorks BSP is not being built on Linux and Solaris (Xilinx Answer 22286)
9.1i EDK - PLB memory addresses are not accessible to debug interface ("ERROR (1059): I-Side Memory Access Check Failed") (Xilinx Answer 25015)
9.1i EDK - TestApp_Memory sample design does not pass on the ML501 board (Xilinx Answer 24989)
9.1i EDK - A successful download of my software application through XMD gives an incorrect memory map (Xilinx Answer 25133)
9.1i EDK - The ML505 board reads the GPIO DIP switch in bit-reverse order (Xilinx Answer 25134)
9.1i EDK - OPB_MDM v2.00.a - MDM clock must be twice as fast as System ACE clock for ELF load (Xilinx Answer 23736)
9.1i EDK SP2, 'mch_opb_ddr2_v1_L_a ' Read Data Comparison Error in mch_opb_ddr2_v1_01_a (Xilinx Answer 25178)
9.1i EDK SP2 - 'mch_opb_emc_v1_01_a', Post Par Simulation fails with timing Error (Xilinx Answer 25181)
9.1i EDK SP2 - 'plb_ddr2_v1_01_a', The pbl_ddr2 in Asynch mode is generating timing errors on signals that have separate clock domains (Xilinx Answer 25185)
AR# 24991
Date Created 09/04/2007
Last Updated 05/14/2007
Status Active
Type General Article