LogiCORE Fibre Channel and Fibre Channel Arbitrated Loop - To avoid BER failures it is important to ensure board meets Virtex-2 Pro MGT specifications

AR#	25035	Search For Another Answer
Topic	IP-Datacom/Storage
Last Updated	04/06/2007
Status	Active

Description

Keywords: bit error rate, reference clock, noise, power supply, X-talk

For Virtex-II Pro board designs, it is important to consult and meet the Power, REFCLK, SSO, and Signal Integrity specifications in the Virtex-II Pro User Guide (UG012) and RocketIO Transceiver User Guide (UG024):
http://xwebpub/xlnx/xweb/xil_publications_display.jsp?category=User+Guides&iLanguageID=1

Solution

It is especially important to meet these specifications when operating at lower line rates such as the 1G Fibre Channel line rate. BER failures can occur in boards with bad reference clocks, noisy power supplies, and outside the SSO and Signal Integrity specifications.