How do you analyze the timing of a transparent latch?
The constraints below can be used. In the example, GATE should be replaced by the signal you have connected to the gate input to the latch.
NET "GATE" TNM_NET = "GATE";
OFFSET = OUT 10 ns AFTER " GATE ";
NET "GATE " BUFG=CLK;
In ISE 9.1i, the latch cannot be analyzed as it is implemented differently (the functionality is correct).
This will be resolved in ISE 9.2i and also worked in ISE 8.2i.