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AR# 25153

MPMC2 GUI v1.8 - GUI Usage Notes and Configuration Limitations


Are there any limitations on the use of the MPMC2 IP Configurator? Are there any suggestions?


This section describes supported and unsupported MPMC2 configurations in the GUI in addition to usage information about the GUI. Violating any GUI configuration requirements may produce a non-functional MPMC2 design. Use caution if your desired MPMC2 configuration violates any of the following requirements.

1. If using SRL FIFO configuration, it is strongly recommended that all pipeline stages be enabled in Data Path. This is required for 64-bit memories when using SRL FIFOs.

2. For new designs, system bring-up, and debugging, it is strongly recommended that the user enable all pipeline stages in the Data Path and Arbiter. This configuration offers the best timing and is more robust. Advanced users can explore latency/area tradeoffs by removing pipeline stages but should retest their systems. Pipeline settings other than what is used on reference designs may not be tested.

3. In the Arbiter Configuration tab, only Algorithm 0 is supported. Values set for Algorithm 1, 2, or 3 are not used by the MPMC2 core. The Active Algorithm will always be algorithm 0 regardless of which algorithm is chosen in the MPMC2 GUI.

4. Using a memory clock > 200 MHz or a PLB/OPB/CDMAC PIM clock > 100 MHz is untested. The GUI will provide a warning for every PIM /memory that has a higher clock frequency, but the user is still permitted to create the design.

5. MPMC2 GUI should be locally installed and run from the install directory. Multi-user installation is not supported.

6. Only two DSPLB PIMs are allowed to be instantiated currently. While the MPMC2 GUI allows for more that two, the code will not compile through XST.

7. Users should not add extraneous/unrelated files to the sub directories used by the GUI. This may result in improper operation of the GUI. Warning: Do not modify or move ANY files in the MPMC2 install directory!

8. Please set the Device field correctly in the GUI so that MPMC is properly configured for the device architecture being used

9. The GUI does not correctly write address information to the control.txt file/MPD file. This should not affect designs, since the BASE/HIGH addresses are normally set in the system.mhs file which overrides these values.

10. On the Arbiter Configuration tab, ?Control Path Pipeline? must be enabled.

11. On the Data Path Configuration tab, the ?Memory Side? checkbox in the ?Write Output Pipeline? box must be enabled.

12. On the Data Path Configuration tab, the ?Memory Side? and ?Port Side? check boxes in the ?Read Pipeline? and ?Write Pipeline? boxes have only been tested with all values enabled, or all values disabled.
AR# 25153
Date Created 05/04/2007
Last Updated 11/12/2010
Status Archive
Type General Article