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AR# 25168

LogiCORE UCF Generator v2.3 for PCI/PCI-X - Release Notes and Known Issues for 9.1i IP Update 3 (9.1i_IP3)


This Release Note and Known Issues Answer Record is for the LogiCORE PCI/PCI-X UCF Generator v2.3 released in 9.1i IP Update 3, and contains the following information:

- General Information

- New Features

- Bug Fixes

- Known Issues

For installation instructions, general CORE Generator known issues, and design tools requirements, see (Xilinx Answer 24847).


General Information

- See (Xilinx Answer 22921) for general information regarding timing closure in Virtex-4 devices.

New Features

- Spartan-3A device support

Bug Fixes

CR 435585: Fixed Virtex-5 UCF files to use correct IO standard for RCLK_P and RCLK_N. It now uses IOSTANDARD = LVDS_25.

Known Issues

-CR 435586: In Virtex-5 UCFs the IDELAYCTRL reference clock pins, RCLK_P and RCLK_N, are not locked to specific sites. You must add LOC constraints for these pins.

- See (Xilinx Answer 25217) regarding duplicated PCI core entries in the CORE Generator taxonomy list.

-See (Xilinx Answer 25221) regarding the Version Information file link not working.

AR# 25168
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article