When I run a DRC check on my Virtex-4 design in PlanAhead, I see the following error:
DCM dcm_0/Using_DCM_ADV.DCM_ADV_INST drives 5 BUFGs, it can only drive up to 4 BUFGs.
This is a known issue in the PlanAhead software at present and can be safely ignored.
As per the Virtex-4 User Guide:
"Any or all of the DCM's nine clock outputs can be used to drive a global clock network."
This issue is scheduled to be fixed in PlanAhead 9.2.