AR #25280 - 11.1 EDK - ML demo boards do not load XPS-generated bitstream from Flash
11.1 EDK - ML demo boards do not load XPS-generated bitstream from Flash
| AR# | 25280 |
| Part | EDK-XPS |
| Last Modified | 2009-04-27 00:00:00.0 |
| Status | Active |
| Keywords | BitGen, CPLD, Flash, ML40x, ML50x, XPS |
Description
Keywords: BitGen, CPLD, Flash, ML40x, ML50x, XPS
My bitstream generated by EDK into the flash device on a Xilinx ML style demo board with FlashWriter does not load. However, the default bitstream store in the Flash can be loaded successfully.
Solution
This occurs because XPS uses the JTAGCLK as the default startup clock in the bitstream. If you want to use the CPLD and Flash configuration solution, use CCLK as the Startup clock.You should modify the startup clock in bitgen.ut (found in your project's etc directory) as follows:
From:
-g StartUpClk:JTAGCLK
To:
-g StartUpClk:CCLK