We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 25280

11.1 EDK - ML demo boards do not load XPS-generated bitstream from Flash


My bitstream generated by EDK into the flash device on a Xilinx ML style demo board with FlashWriter does not load. However, the default bitstream store in the Flash can be loaded successfully.


This occurs because XPS uses the JTAGCLK as the default startup clock in the bitstream. If you want to use the CPLD and Flash configuration solution, use CCLK as the Startup clock.

You should modify the startup clock in bitgen.ut (found in your project's etc directory) as follows:


-g StartUpClk:JTAGCLK


-g StartUpClk:CCLK

AR# 25280
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article