AR #25311 - 9.1i EDK ModelSim - "** Fatal: (vsim-3348) Port size (1) does not match actual size (32) for port '/system/opb/opb/opb_"
9.1i EDK ModelSim - "** Fatal: (vsim-3348) Port size (1) does not match actual size (32) for port '/system/opb/opb/opb_"
| AR# | 25311 |
| Part | EDK-simgen |
| Last Modified | 2007-06-06 00:00:00.0 |
| Status | Active |
| Keywords | optimization, vopt, vsim, arbiter |
Description
Keywords: optimization, vopt, vsim, arbiter
When I simulate my PPC design, the following error message occurs; my SmartModel setup is correct:
"# Loading opb_arbiter_v1_02_e.or_gate(imp)#1
# ** Fatal: (vsim-3348) Port size (1) does not match actual size (32) for port '/system/opb/opb/opb_abus_i/y'.
# Time: 0 ps Iteration: 0 Instance: /system/opb/opb/opb_abus_i File: /opt/xilinx/EDK8.2/hw/XilinxProcessorIPLib/pcores/opb_arbiter_v1_02_e/hdl/vhdl/or_gate.vhd Line: 125
# FATAL ERROR while loading design
# Error loading design
# 1"
Solution
Insert the -novopt command in the "do file" that you are using to run the simulation. Alternatively, you can work around this issue by setting the modelsim.ini variable "VoptFlow" to 0 (zero). The modelsim.ini files are located in the c:\<modelsim>\, c:\<ise_compiled_libraries>, and c:\<edk_compiled_libraries> directories.See (Xilinx Answer 24293) for related information.