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AR# 25315

9.1i EDK - "ERROR:Place:872 - Delay element "pci_bridge/pci_bridge/pci_core/I_pcim_lc_32bit_generate.PCI_LC"

Description

In EDK 9.1isp2, I receive an error message, similar to the following, in a design consisting of opb_pci. The error message complains about IDELAY. This error did not occur in EDK8.2i.

"ERROR:Place:872 - Delay element "pci_bridge/pci_bridge/pci_core/I_pcim_lc_32bit_generate.PCI_LC/IDSEL" has been placed

at ILOGIC_X0Y237 due to the following location constraint on component "PCI_Bridge_IDSEL_pin":

COMP "PCI_Bridge_IDSEL_pin" LOCATE = SITE "D26" LEVEL 1

However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay

controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any

location constraint. Please refer to the usage document to use the controller efficiently.

ERROR:Place:872 - Delay element "pci_bridge/PCI_monitor<0>" has been placed at ILOGIC_X0Y252 due to the following

location constraint on component "fpga_0_PCI_Bridge_FRAME_N":

COMP "fpga_0_PCI_Bridge_FRAME_N" LOCATE = SITE "B26" LEVEL 1

However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay

controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any

location constraint. Please refer to the usage document to use the controller efficiently."

Solution

To resolve this problem, change your constraints so that IDELAY_CTRL and ILOGIC are in the same clock region.

AR# 25315
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article