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AR# 25325

9.2i Floorplanner - An error occurs when writing DSP48 component LOC constraints


When I try to lock down the DSP48 component in a Virtex-5 design, the constraint written to the UCF is "DSP48E_XnYn" instead of "DSP48_XnYn".  


When is this issue going to be fixed?


This problem has been fixed in the latest 9.2i Service Pack available at: 

The first service pack containing the fix is 9.2i Service Pack 1.

AR# 25325
Date 05/21/2014
Status Archive
Type General Article
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