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AR# 2632

XC3000A, XC4000/E/X - How do I implement flip-flops with both asynchronous preset and clear/reset inputs?


Keywords: flip-flop, register, preset, reset, clear

Urgency: Standard

General Description:
The Xilinx XC3000/A/L and XC4000/E/EX/XL architectures do not
support flip-flops with both PRESET and RESET inputs. How
do I implement this functionality?


Since neither architecture supports flip-flops with both SET
and RESET pins, there is no efficient way to implement such
a function. The best one can do is mimic such a configuration,
using two flip-flops (one with a direct PRESET
input like FDPE, and the other with a direct RESET input like
FDCE) in conjunction with a 2:1 MUX; you can use this to select the
appropriate flop, depending on which function was desired at
any given time.
AR# 2632
Date Created 08/31/2007
Last Updated 02/08/2001
Status Archive