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AR# 29046

LogiCORE Viterbi Decoder v6.1 - When I instantiate more than one Viterbi decoder in a Virtex-5 design, implementation fails with a Pack error


Keywords: Virtex-5, Viterbi Decoder v6.1, Pack:2239

When there is more than one Viterbi Decoder instantiated in a Virtex-5 design, implementation of the design fails during MAP with the following error:
ERROR:Pack:2239 - Unable to obey design constraints (LUTNM=lutpair6amw1161)
which require the combination of the following function generator symbols
into a single LUT site:
LUT symbol "test_inst_2/blk00000003/blk00000004/blk00000290" (Output Signal
= test_inst_2/blk00000003/blk00000004/sig0000049b)
LUT symbol "test_inst_1/blk00000003/blk00000004/blk00000290" (Output Signal
= test_inst_1/blk00000003/blk00000004/sig0000049b)
LUT symbol "test_inst_2/blk00000003/blk00000004/blk0000028f" (Output Signal
= test_inst_2/blk00000003/blk00000004/sig00000496)
LUT symbol "test_inst_1/blk00000003/blk00000004/blk0000028f" (Output Signal
= test_inst_1/blk00000003/blk00000004/sig00000496)
A LUTNM constraint instance may only be applied to two function generator
symbols. Please correct the design constraints accordingly.


This is a known issue. It will be fixed in the Viterbi Decoder v6.2.

Please See (Xilinx Answer 29448) for a detailed list of LogiCORE Viterbi Decoder Release Notes and Known Issues.

AR# 29046
Date Created 03/14/2008
Last Updated 08/04/2009
Status Archive
Type General Article