Description
Keywords: 10, Ten, Gigabit, Ethernet, XAUI, known, issues, v7.0, v7.1, ip1_j, IP Update 2, Virtex-4
Virtex-4 XAUI v7.0 and v7.1 Verilog example design has GT11 comma alignment inputs driven by incorrect signals. This could cause rx comma alignment/synchronization to not function correctly in hardware. This is not an issue for the VHDL version of the example design.
Solution
For the Verilog example design for v7.0 and v7.1 <core_name>_block.v the rocketio_wrapper inputs:
MGT#_ENMCOMMAALIGN_IN
MGT#_ENPCOMMAALIGN_IN
are all driven by:
mgt_enable_align[0]
The code should be changed from:
.MGT0_ENMCOMMAALIGN_IN ( mgt_enable_align[0] ),
.MGT0_ENPCOMMAALIGN_IN ( mgt_enable_align[0] ),
..
.MGT1_ENMCOMMAALIGN_IN ( mgt_enable_align[0] ),
.MGT1_ENPCOMMAALIGN_IN ( mgt_enable_align[0] ),
..
.MGT2_ENMCOMMAALIGN_IN ( mgt_enable_align[0] ),
.MGT2_ENPCOMMAALIGN_IN ( mgt_enable_align[0] ),
..
.MGT3_ENMCOMMAALIGN_IN ( mgt_enable_align[0] ),
.MGT3_ENPCOMMAALIGN_IN ( mgt_enable_align[0] ),
To:
.MGT0_ENMCOMMAALIGN_IN ( mgt_enable_align[0] ),
.MGT0_ENPCOMMAALIGN_IN ( mgt_enable_align[0] ),
..
.MGT1_ENMCOMMAALIGN_IN ( mgt_enable_align[1] ),
.MGT1_ENPCOMMAALIGN_IN ( mgt_enable_align[1] ),
..
.MGT2_ENMCOMMAALIGN_IN ( mgt_enable_align[2] ),
.MGT2_ENPCOMMAALIGN_IN ( mgt_enable_align[2] ),
..
.MGT3_ENMCOMMAALIGN_IN ( mgt_enable_align[3] ),
.MGT3_ENPCOMMAALIGN_IN ( mgt_enable_align[3] ),