UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 29166

LogiCORE OBSAI v1.1 - When simulating, warnings and error messages occur

Description

When simulating a design with OBSAI core, warnings similar to the following might occur:

"# ** Error: Error : PLL_ADV input DI is set toUUUUUUUU00UUUUUU . The bit 15 to 8 need to be set to 00h at address DADDR = 11100.

#

# Time: 7420 ns Iteration: 1 Instance: /tc_basic_om/tb/incgtpgen1/uut_c1/gtp_and_clocks_i/tx_clk_gen_i/pll_i

# ** Warning: Warning : Address DADDR=81 on the DCM_ADV instance is unsupported.

#

# Time: 7420 ns Iteration: 1 Instance: /tc_basic_om/tb/incgtpgen1/uut_c1/gtp_and_clocks_i/rx_clk_gen_i/dcm_i

# ** Error: Error : PLL_ADV input DI is set toUUUUUUUU00UUUUUU . The bit 15 to 8 need to be set to 00h at address DADDR = 11100.

#

# Time: 7420 ns Iteration: 1 Instance: /tc_basic_om/tb/g_core2/incgtpgen2/uut_c2/gtp_and_clocks_i/tx_clk_gen_i/pll_i

# ** Warning: Warning : Address DADDR=81 on the DCM_ADV instance is unsupported."

Solution

These warnings are caused by bugs in the PLL and DCM UniSim models and can be safely ignored.

AR# 29166
Date Created 10/28/2007
Last Updated 12/15/2012
Status Active
Type General Article