| AR# | 29170 |
| Part | SW-SysGen |
| Last Modified | 2009-09-10 00:00:00.0 |
| Status | Active |
| Keywords | SysGen, not matching, mismatch, Synplify Pro, Behavioral simulation |
Keywords: SysGen, not matching, mismatch, Synplify Pro, Behavioral simulation
Why do I see simulation mismatches at the beginning of my HDL simulation generated from System Generator for DSP if Synplify is used for synthesis?