The following inferred multiplier produces incorrect timing results with Spartan-3A device
if rising_edge (clk) then
A_int <= A;
B_int <= B;
S_int <= A_int * B_int;
S <= S_int;
A_int, B_int and S_int are placed inside the HARDMULT.
The timing analyzer doesn't take into account the input registers. The only timing it knows is Tmsdck_P, while we should see Tmsdck_A or Tmsdck_B. This occurs only when targeting Spartan-3A. The issue does not exist for Spartan-3E.
This is a known issue and is fixed in ISE 9.2.02i.