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AR# 29228

LogiCORE FIFO Generator v4.1 - When FULL is asserted, PROG_EMPTY might assert or PROG_FULL might de-assert


A FIFO Generator v4.1 core using Common Clock configuration and Single or Multiple Programmable Full or Empty Threshold Input Port options might exhibit unusual behavior with the PROG_FULL and PROG_EMPTY flags. Specifically, it is possible that when FULL is asserted, PROG_EMPTY might assert and PROG_FULL might de-assert. 


This issue occurs when using the following FIFO options: 

- Common Clock FIFO 

- Single/Multiple Programmable Empty/Full Threshold Input Port 

- Almost Full flag is not used (i.e. not selected during CORE Generator customization)


This issue will be fixed in the next core release. Until then, you can use one of the following to work around this issue: 


- Implement logic outside of the FIFO core that will force PROG_EMPTY Low when FULL is asserted, and force PROG_FULL High when FULL is asserted. 

- Ignore the PROG_EMPTY and PROG_FULL flags when FULL is asserted.

AR# 29228
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article