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Virtex-5 System Monitor - How do you declare I/O pins as auxiliary analog input pins?

AR# 29240

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Topic Agile Mixed Signal
Last Updated 10/12/2011
Status Active
Description

How do you declare I/O pins as auxiliary analog input pins of System Monitor?

Solution


When instantiating the System Monitor, its auxiliary analog input pins have to be declared as such in the top level port mapping. MAP and PAR will automatically place them correctly. 

 

For example, in VHDL : 

 

entity toplevel is 

Port ( clk : in STD_LOGIC; 

Vauxp_15 : in STD_LOGIC; 

Vauxn_15 : in STD_LOGIC; 

---- 

 

SYSMON_inst : SYSMON 

Port map (  

--- 

VAUXP => Vccauxp_int, 

VAUXN => Vccauxn_int 

); 

 

 

 

Vccauxp_int <= Vauxp_15 & "000000000000000"; 

Vccauxn_int <= Vauxn_15 & "000000000000000";
 
 
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