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AR# 29254

9.2i Install - EDK Release Notes Known Issues


Keywords: alert, readme, 92

The EDK 9.2i Release Notes, packaged with your EDK shipment or located on the Electronic Fulfillment site, contain installation instructions, system requirements, and other general information about EDK 9.2i.

This Known Issues Answer Record is a supplement to the 9.2i Release Notes and contains links to information on known issues in the design tools that might be resolved in service packs or future versions.

NOTE: EDK 9.2i requires ISE 9.2.03i.


General EDK

(Xilinx Answer 29553) 9.2i EDK - ERROR:XdmHelpers:648 - The specification "TS_ppc405_0_DCURDDACK" is invalid
(Xilinx Answer 29107) 9.2i EDK - Which files are necessary for an SDK project to be used with a version control system?
(Xilinx Answer 29255) 9.2i EDK - Why am I unable to target a Virtex-II Pro in Base System Builder (BSB)?
(Xilinx Answer 29259) 9.2i EDK - Why does ISE reimplement my EDK project when there are no changes?
(Xilinx Answer 29262) 9.2i EDK - SimGen "ERROR:MDT - File not found in any repository" with Verilog pcores
(Xilinx Answer 29276) 9.2i EDK - ERROR:Xst:1484 - A core is unlicensed ! - After upgrading from EDK 9.1i to 9.2i, I receive license errors for some of the licensed IP
(Xilinx Answer 29379) 9.2i EDK - GCC 4.1.1 Support for MicroBlaze
(Xilinx Answer 29380) 9.2i EDK - GCC 4.1.1 Support for PowerPC
(Xilinx Answer 29386) 9.2i EDK - I cannot launch SDK from command line with -xmp switch
(Xilinx Answer 29387) 9.2i EDK - PPC 405 fails to compile with the Wind River Diab compiler
(Xilinx Answer 29388) 9.2i EDK - Libraries selection is not updated when OS other than standalone or xilkernal selected
(Xilinx Answer 29389) 9.2i EDK - "ERROR:MDT - issued from TCL procedure "::hw_clock_generator_v1_00_a::gen_clock_circuit""
(Xilinx Answer 29418) 9.2i EDK, Spartan-3A DSP - "ERROR:Place:848 - Automatic clock placement failed"
(Xilinx Answer 29425) 9.2i EDK - What is the change log for the mch_opb_ddr2_v1_02_a Core?
(Xilinx Answer 29438) 9.2i EDK - My TEMAC (hard or soft) or my Spartan-based MPMC controllers are not working
(Xilinx Answer 29444) 9.2i EDK - Can I install EDK tools on SUSE Linux distribution?
(Xilinx Answer 29445) 9.2i EDK - When I try to connect with XMD, the XMD window briefly appears and then disappears
(Xilinx Answer 29463) 9.2i EDK - How do I reactivate an application in XPS after it has been imported to SDK?
(Xilinx Answer 29462) 9.2i EDK - Timing simulation testbench fails to compile for designs with MGT
(Xilinx Answer 29465) 9.2i EDK - Design on Spartan-3E 1600 device fails for no obvious reason

General EDK IP

(Xilinx Answer 29505) 9.2i EDK - PLBv46_PCI v1.00.a does not boot Linux when the PPC is running at 300 MHz clock and the PLB bus is running at 100 MHz clock
(Xilinx Answer 29506) 9.2i EDK - SysMon_v1_00_a, SysMon SW driver for xps_sysmon_adc_v1_00_a does not work correctly; latest software drivers are available
(Xilinx Answer 29524) 9.2i EDK - XPS_LL_TEMAC v1.00.a IDELAY Controller related parameters are not included in the corresponding MPD file for the core
(Xilinx Answer 29529) 9.2i EDK - opb_usb2_device_v1_00_a IP core does not support data PID sequencing for isochronous data transfers in high speed mode
(Xilinx Answer 29199) 9.2i EDK - MPMC v3.00a - INIT_DONE active before MPMC finishes reset
(Xilinx Answer 29200) 9.2i EDK - MPMC v3.00a - Initialization does not complete with read-only XCL ports as port 0
(Xilinx Answer 29434) 9.2i EDK - MPMC v3.00a - XCL PIM bursts incorrect data
(Xilinx Answer 29460) 9.2i EDK - MPMC v3.00a - Use of NPI signal WrFIFO_Flush is not supported
(Xilinx Answer 29515) 9.2i EDK - MPMC v3.00a - ECC fails when single I/O is corrupted for 8/16/32-bit memories
(Xilinx Answer 29516) 9.2i EDK - MPMC v3.00a - MPMC MHS parameters are case sensitive
(Xilinx Answer 29517) 9.2i EDK - MPMC v3.00a - PLB secondary read transactions return incorrect data
(Xilinx Answer 29518) 9.2i EDK - MPMC v3.00a - PLB read burst returns data from incorrect value
(Xilinx Answer 29564) 9.2i EDK, MPMC v3.00a - MPMC2 to MPMC v3 migration/upgrade guide
(Xilinx Answer 29761) 9.2i EDK, MPMC v3.00a - How do I design a board to support future versions of MPMC and MIG?
(Xilinx Answer 29221) 9.2i EDK, MPMC v3.00a - Spartan-3 MIG PHY usage guidelines
(Xilinx Answer 29641) 9.2i EDK, MPMC v3.00a - How do I use a memory part that is not listed in the MPMC GUI?
(Xilinx Answer 29737) 9.2i EDK, MPMC v3.00a - What is the expected performance of MPMC?
(Xilinx Answer 29691) 9.2i EDK, MPMC v3.00a - IO Clock Net "delayed_dqs<0>" cannot possibly be routed to component "u_iserdes_dq"
(Xilinx Answer 29690) 9.2i EDK, MPMC v3.00a - SDMA PIM does not correctly coalesce interrupts
(Xilinx Answer 29591) 9.2i EDK, MPMC v3.00a, SDMA v1_00_a - Corruption occurs with multiple buffer descriptors with non-word aligned buffers
(Xilinx Answer 29712) 9.2i EDK, MPMC v3.00a - Spartan-3 designs have NgdBuild:455 multiple driver or NgdBuild:924 input pad net errors
(Xilinx Answer 29586) 9.2i EDK, MPMC v3.00a - ERROR:MDT - issued from TCL procedure "check_wr_fifo", Port 1 cannot be configured to be Read-Only when C_XCL1_WRITEXFER > 0
(Xilinx Answer 29521) 9.2i EDK, MPMC v3.00a - Timing failures in PLB and SDMA PIMs when using 2:1 memory to PLB ratio
(Xilinx Answer 29519) 9.2i EDK, MPMC v3.00a - Rounding errors occur for non-integer clock frequencies
(Xilinx Answer 29637) 9.2i EDK, MPMC v3.00a - Cannot write to the 8th byte (last byte in aligned double word) when ECC is disabled
(Xilinx Answer 29698) 9.2i EDK, MPMC v3.00a - Data corruption occurs on memory writes when using read-only PIM on port 0, and different write FIFO pipeline settings
AR# 29254
Date Created 10/28/2007
Last Updated 12/05/2007
Status Active
Type General Article