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AR# 29425

9.2i EDK - What is the change log for the mch_opb_ddr2_v1_02_a Core?

Description

What is the change log for the mch_opb_ddr2_v1_02_a Core?

Solution

Changelog: 

"pipeline stage removed" 

 

Pipeline stage removed because this stage caused the MicroBlaze to stall because it was not passing the read request to the DDR2 controller whenever there was a simultaneous request from the channels and one of the channel's requests was broken by a DDR2 refresh.

AR# 29425
Date Created 10/28/2007
Last Updated 05/20/2014
Status Archive
Type General Article