Why do I see incorrect outputs when I simulate an unscaled FFT with a point size larger than 1024, and the Complex Multiplier Optimize for Speed option is selected?
The problem is that the output data is incorrect when simulating an unscaled FFT using the Radix-2, Radix-4, or streaming architectures on Virtex-4 or Virtex-5 devices when the complex multiplier is optimized to use DSP48s (for speed). This issue does not affect the Radix-2-Lite architecture.
The following two factors must both be true to cause the incorrect output data:
- The output width is greater than 35 bits.
- The phase factor width is less than or equal to 17 bits
You can work around this issue with one of the following:
- Do not optimize the complex multiplier for speed by using DSP48s; this uses a different multiplier architecture with a slight drop in performance but a similar slice count.
- Use a scaled FFT instead, and continue to optimize the complex multiplier to use DSP48s.
- Use the Radix-2-Lite architecture if this meets the target throughput requirements, as it is unaffected by this issue.
This issue has been resolved in the FFT v4.1.
See (Xilinx Answer 29209) for a detailed list of LogiCORE Fast Fourier Transform (FFT) Release Notes and Known Issues.