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AR# 29543

Spartan-3A/-3AN/-3ADSP - IBUF_DLY_ADJ / IBUFDS_DLY_ADJ does not enable the delay


In the Spartan-3A family of devices, the IBUF_DLY_ADJ and IBUFDS_DLY_ADJ delay values set in software are not reflected in the bit files and on the hardware.


In Spartan-3A, Spartan-3AN, and Spartan-3A DSP, even though the delay values are set correctly in software and can be seen in FPGA Editor, the delay values are not implemented in hardware. A tool bug in ISE 9.2i Service Pack 3 and earlier is causing this issue.

The fix will be included in ISE 9.2i Service Pack 4.

AR# 29543
Date Created 11/14/2007
Last Updated 12/15/2012
Status Active
Type General Article