When MicroBlaze is configured to use the Memory Management Unit, instructions might be loaded incorrectly into the cache. This can occur because an address strobe might be incorrectly generated in MicroBlaze when the memory address is not valid, causing the LMB memory to be addressed, which then interferes with the instruction storage in the cache. This leads to execution of an incorrect instruction sequence when these instructions in the cache are used by the processor.
If you are encountering this problem, you can work around it by disabling the MMU. This issue will be fixed in Service Pack 1.