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AR# 29588

9.2i EDK - OPB_SDRAM_v1_00_e issues incorrect read or write transaction after row-crossing burst


After performing a burst transaction to OPB_SDRAM, the next transaction is incorrect. The next transaction is either a read instead of a write, or a write instead of a read.  


How do I resolve this?


This issue is not planned to be fixed. Upgrading the entire system to a MPMC-based design will also avoid this issue.  


Contact Xilinx Technical Support for more information: 


AR# 29588
Date Created 09/23/2008
Last Updated 05/22/2014
Status Archive
Type General Article