| AR# |
29761 |
| Part |
IP-MPMC |
| Last Modified |
2008-05-14 00:00:00.0 |
| Status |
Active |
| Keywords |
pin-out, pinout, PHY, migrate, upgrade, compatibility, ecc |
Description
Keywords: pin-out, pinout, PHY, migrate, upgrade, compatibility, ecc
Which MIG versions should be used with MPMC? How do I design a board that will support future MPMC versions?
Solution
Consult the MPMC data sheet for updated information on MPMC migration. From the MPMC v3 data sheet:
- This version of MPMC should be used with MIG v1.73. Older or newer versions of MIG might not produce a User Constraint File (UCF) compatible with this version of MPMC. The exception is Virtex-5 DDR2 designs, where MIG v2.0 pin-outs should be used to maintain forward compatibility to future versions of MPMC. MIG v2.0 introduces a new Virtex-5 DDR2 data capture design that will be incorporated into a future version of MPMC. Virtex-5 DDR2 boards should also be designed to support differential DQS to be compatible with future versions of MPMC.
- It is required and extremely important to ensure that the layout and pin-out of any other boards to be used with MPMC follow the design requirements of the supported MPMC MIG version. Failure to follow MIG design rules and all applicable MIG UCF constraints could result in an inoperable MPMC.Migration scripts are available to upgrade MIG v1.73 Virtex-5 DDR2 MIG-based design UCFs to the MIG v2.1 version used by MPMC v4.00.a. See:
(Xilinx Answer 29261) - 10.1 EDK, MPMC v4.00.a - How do I revup a Virtex-5 DDR2 MPMC v3 design to MPMC v4?
For memory designs utilizing ECC, a full 8 bits of ECC data pins must be routed to the memory device for compatibility with MPMC v4.00.a and later. See
(Xilinx Answer 29515).
Other PHY/device types have less significant changes between MIG v1.73 and MIG v2.1 that would affect MPMC designs.
