| AR# | 30048 |
| Part | SW-Timing Analyzer/TRCE |
| Last Modified | 2009-06-30 00:00:00.0 |
| Status | Active |
| Keywords | technology, schematic, correlated |
Keywords: technology, schematic, correlated
In a partitioned design, if I cross-probe a path that has constrained objects in it and select the Show Translated Path in Technology View -Exploration Mode, the schematic is displayed, but the constraints on the I/O and BUFG are not listed. However, if I cross-probe to the Implemented Path in Technology View, the constraints are correctly annotated for the IOB and BUFG.