We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 30050

MIG v2.0 Virtex-5 DDR2 - "WARNING:Par:288" warnings issued on "dummy_carry*" and "dummy_lut*" signals


There are a significant number of warnings in my DDR2 design from MIG 2.0 that are similar to the following:

"WARNING:Par:288 - The signal u_ddr2_top_0/u_mem_if_top_0/u_phy_top_0/u_phy_io_0/gen_dq[62].u_iob_dq/dummy_carry4_co_a[0] has no load. PAR will not attempt to route this signal."

Can these warnings be ignored?


You can safely ignore these warnings. This logic is necessary to ensure proper placement and, consequently, successful directed routing of a portion of the MIG 2.0 DDR2 design.

If you want to filter these warnings from being displayed or reported, refer to the Project Navigator Help for more information on the ISE Message Filtering capability. Or, you can go to:


AR# 30050
Date 12/15/2012
Status Active
Type General Article
Page Bookmarked