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LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) - Release Notes and Known Issues

AR# 30157

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Topic Multimedia Video Imaging
Last Updated 02/22/2010
Status Archive
Description

This Answer Record contains the Release Notes and Known Issues list for the CORE Generator interface LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) Core. 

 

The following information is listed for each version of the core: 

- New Features 

- Bug Fixes 

- Known Issues 

 

LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) Lounge: 

http://www.xilinx.com/support/documentation/ip_dc_do-di-mpeg4_decoder.htm
 

This IP has been Discontinued and there is no replacement. 

http://www.xilinx.com/support/documentation/customer_notices/xcn08022.pdf

Solution

General LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) Issues 

- Why does the last macro block of the last frame not come out of the MPEG4 Part 2 Decoder? See (Xilinx Answer 24772)

- Are there Windows CODECs that support the Xilinx MPEG4 Part2 core features? See (Xilinx Answer 24836)

- Can I use the Spartan-3 device netlist when targeting a Spartan-3E device? See (Xilinx Answer 25091)

- Why does the simulation fail with a fatal error, when the Display is set to 16-bit color? See (Xilinx Answer 29419) 

 

LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) v1.3 

Initial Release January 16, 2007 

New Features 

- Added Support for Spartan-3A DSP FPGA 

- Added new copy controller and FIFO netlists 

Bug Fixes 

- N/A 

Known Issues 

- N/A 

 

LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) v1.2 

Initial Release August 23, 2006 

New Features 

- Added support for Spartan-3A and Virtex-5 devices 

Bug Fixes 

- N/A 

Known Issues 

- Missing Read FIFO netlist 

 

LogiCORE IP MPEG-4 Part 2 Simple Profile Decoder (MPEG-4 Part 2 SP) v1.1 

Initial Release October 24, 2005 

New Features 

- Support for Spartan-3, Virtex-II, Virtex-II Pro, Virtex-4 devices 

- MPEG-4 Part 2 Simple Profile standard 

- Maximum frame size for standard TV resolutions 

- IDCT-based transform 

- Macroblock processing 

- 4:2:0 YUV processing 

- Motion compensation 

- Residual processing 

- 8-bit input data 

- 12-bit IDCT coefficients 

- AC/DC prediction 

- Variable length decoder 

- Local YUV buffer 

- Communication primitives 

- Bit-accurate testing 

- I and P Frame Processing 

Bug Fixes 

- N/A 

Known Issues 

- Missing Read FIFO netlist

 
 
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