| AR# |
30206 |
| Part |
IP-MPMC |
| Last Modified |
2008-04-02 00:00:00.0 |
| Status |
Active |
| Keywords |
RdModWR, latency, ECC, burst |
Description
Keywords: RdModWR, latency, ECC, burst
In the MPMC data sheet, the PIM<Port_Num>_RdModWr restriction is incorrect. What are the requirements for asserting PIM<Port_Num>_RdModWr?
Solution
This is an error in the data sheet, which should read as follows:
This active High signal indicates that if the request is a write,
MPMC should do a read/ modify/write
Only valid when PIM<Por_Num>_AddrReq is valid.
Only valid when C_INCLUDE_ECC_SUPPORT is set to 1.
This must be set to 1, if:
* The total transfer size specified by PIM<Port_Num>_Size * 32 (bits/word) is less than C_MEM_DATA_WIDTH * 4 (beats/burst), to satisfy the constant memory burst length of 4.
-or-
* the PIM<Port_Num>_WrFIFO_BE bits for the transfer are not guaranteed to be 1, as MPMC ECC does not currently utilize data mask (DM) signals.
This error is planned to be fixed starting in the latest MPMC Core, to be released in EDK 10.1 Service Pack 1.
