When I write a new phase value to the phase offset register for a specific channel, the output for that channel does not reflect this change.
This is a known issue with the DDS v2.1 and will be resolved in the next release of the core.
In multichannel designs with phase offset, there are circumstances in which the phase adjust value for channel N will in fact apply to channel N-1 (modulo number of channels). For example, in a three-channel design (channels 0, 1, and 2), the initial value of phase offset and any dynamically programmed value of phase offset for channel 1 will apply to channel 0, 2 to 1, and 0 to 2.
This defect applies only in the following circumstances: (Number of channels >1) AND (phase offset is constant or programmable) AND (DSP48 use is minimal OR (DSP48 use is maximal and latency is maximal or one less than maximal)). Maximal latency is the value when latency allocation is automatic.