^

AR# 30365 10.1 Timing Analysis - False Hold violation in FROM:TO/OFFSET IN constraint

After I run Timing Analysis on the design with FROM:TO, I receive a hold violation. I did not receive a hold violation in 9.2isp4.

The issue is that the FROM:TO is ending at a clock pin of a flip-flop, which does not have a hold requirement.

To work around this problem, remove the flip-flop that is causing the hold violation.

This problem has been fixed in the latest 10.1 Service Pack available at:

http://www.xilinx.com/support/download/index.htm
The first service pack containing the fix is 10.1 Service Pack 1.

AR# 30365
Date Created 02/24/2008
Last Updated 12/15/2012
Status Active
Type General Article