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AR# 30538 9.2 Timing/Virtex-5 - Timing Report does not list the critical path for the DSP48E component with the MREG set to 0

Keywords: timing, report, critical, path, DSP48E, mreg, component, Virtex-5

When I review my timing report for my DSP48E design, the timing report does not list the DSP48E with the MREG=0 as the critical path nor a "WARNING:TIMING:3232" message about min period failure.

When is this going to be fixed?

This issue affects all previous versions of ISE that support Virtex-5, and will be resolved in a future release of the design tools, ISE 10.1 Service Pack 1.

To work around this, refer to the Virtex-5 Data Sheet for the minimum period for the DSP48E with the MREG=0:

http://www.xilinx.com/support/documentation/virtex-5_data_sheets.htm

Also see (Xilinx Answer 30537).
AR# 30538
Date Created 03/12/2008
Last Updated 03/26/2008
Status Active
Type
Feed Back