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11.2 CORE Generator - Incorrect VHO file created for Reed/Solomon Decoder when no license is found

AR# 30542

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Topic CORE Generator
Last Updated 02/17/2011
Status Archive
Description


When I generate a core, an invalid ".vho" file is produced when no valid license is available for the Reed/Solomon Decoder v6.0 core. 

 

The ".vho" file includes all input and output ports on the core, and the buses have a length of (0 downto -1).  

 

Example: ".vho" produced; 

 

component dvb_rs_dec 

port ( 

data_in: IN std_logic_VECTOR(0 downto -1); 

mark_in: IN std_logic_VECTOR(0 downto -1); 

n_in: IN std_logic_VECTOR(0 downto -1); 

r_in: IN std_logic_VECTOR(0 downto -1); 

sync: IN std_logic; 

clk: IN std_logic; 

ce: IN std_logic; 

erase: IN std_logic; 

reset: IN std_logic; 

sr: IN std_logic; 

punc_sel: IN std_logic_VECTOR(0 downto -1); 

bit_err_0_to_1: OUT std_logic_VECTOR(0 downto -1); 

bit_err_1_to_0: OUT std_logic_VECTOR(0 downto -1); 

bit_err_rdy: OUT std_logic; 

data_out: OUT std_logic_VECTOR(0 downto -1); 

mark_out: OUT std_logic_VECTOR(0 downto -1); 

data_del: OUT std_logic_VECTOR(0 downto -1); 

blk_strt: OUT std_logic; 

blk_end: OUT std_logic; 

info_end: OUT std_logic; 

erase_cnt: OUT std_logic_VECTOR(0 downto -1); 

err_found: OUT std_logic; 

err_cnt: OUT std_logic_VECTOR(0 downto -1); 

fail: OUT std_logic; 

ready: OUT std_logic; 

rffd: OUT std_logic); 

end component;

Solution


Once a valid license is obtained, the core can be regenerated to obtain the correct files. 

 

For a detailed list of LogiCORE Reed Solomon Decoder Release Notes and Known Issues, see (Xilinx Answer 30176).
 
 
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